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DACS: Physical Layer

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Physical Layer

This protocol is intended to be used with a standard asynchronous serial port running at 9600 or 19200 baud, 8 data bits, no parity, one stop bit (8-N-1). Electrical characteristics of the serial line may follow EIA 232C, EIA 422 or EIA 485 specifications. Support for the 68HC11 internal serial communications interface (SCI) shall be provided, as well as for the R65C51 Asynchronous Communications Interface Adapter (ACIA).

Steve Richardson 2000-07-06

Table of Contents

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Contents
List of Figures
List of Tables
Executive Summary
- What Does the System do?
- Why Design and Implement this System?
- Project Goals
- Deliverables
- Conclusions
Introduction
- Design Methodologies
- Application Analysis
- System Overview
High-Level Hardware Specifications
- Control Board
- Mixer Unit
Module-Level Hardware Specifications
- Control Board
- Mixer Unit
Inter-Module Specifications
- Control Board
- Mixer Unit
- Digital Control Bus
Hardware Schematics
- Control Board
- Mixer Unit
Hardware Verification
- Control Board
- Mixer Unit
Hardware PC Board Designs
- Control Board
- Mixer Unit
Hardware Chassis
- Control Board
- Mixer Unit
High-Level Firmware Design
- Control Board
- Mixer Unit
- The DACS Firmware Library
Firmware Protocols
- Serial Communications Protocol
Firmware Modules
- Firmware Library
- Control Board
- Mixer Unit
Firmware Code
- Firmware Library, dacslib
- Control Board
- Mixer Unit
High-Level Software Design
- Overall System: The Distributed Concept
- Functional Design
Software Graphical User Interface
Software Code
- MIDI Controller
VHDL Code
- Control Board
- Mixer Unit
Axiom MC68HC11 Single Board Computer References
References
- Books
- Data Books and Data Sheets
- Web Sites
About this document ...

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